Has TSMC lied about its 5nm node density?

TSMC’s 5nm node and its variants are going to change into probably the most related

TSMC’s 5nm node and its variants are going to change into probably the most related within the coming years throughout the PC. Not solely due to the truth that AMD will use it for its future chips such because the Ryzen 7000, EPYC Genoa and the RX 7000 GPUs. Nor can we neglect that TSMC can also be a consumer and even Intel, because the built-in graphics in Meteor Lake and a few Ponte Vecchio HPC graphics parts will use it for his or her manufacturing. So in a method or one other, the principle gamers within the business make use of this manufacturing node in a method or one other. Though in the meanwhile, the one chips utilizing this manufacturing course of are these of Apple

TSMC’s 5nm node density is decrease than marketed

Though this headline could seem destructive, this has a proof and it’s that from Angstronomics they’ve made an attention-grabbing article the place they inform us of the rationale why TSMC has given the density of its 5nm node incorrect. By this we imply the variety of transistors per space and thus how complicated the chips might be constructed. The Taiwanese foundry formally states that it’s 171 million transistors per sq. millimeter. Nevertheless, a radical evaluation reveals that this determine is decrease and that it’s 137.6 million transistors per sq. millimeter.

They’ve executed this by measuring by means of an digital microscope the scale of the transistors used to construct the Apple A15 processor of the most recent era iPhone. Lwhich measure 210 nm in Cell Top and 51 nm in CPP. Nicely, each values ​​are utilized in a comparative technique to know the scale of a transistor with respect to a earlier node. Thus, TSMC’s N7 node has values 240nm and 57nm respectivelywhich provides it a density of 90.64 million transistors per sq. millimeter. Within the case of Intel’s 10mm node, not too long ago christened the Intel 7, we’re speaking a couple of determine of 100.33.

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If the numbers make you dizzy, don’t fear. Which means in the identical area, chip designers can match as much as 51.8% extra logic gates on its chips constructed at 5nm than these at 7nm. Which signifies that it’s not a full node bounce. Truly the transistors should not even 5nm. Since this metric ceased to correspond to actuality a very long time in the past and it’s extra of a advertising instrument.

Has TSMC given false figures?

No, probably not, and it is because the Taiwanese foundry doesn’t use the metric that we’ve mentioned within the earlier part. What TSMC normally does is adapt an already recognized chip to the brand new node to get its metrics. For this they make use of the design of a Cortex A72, in fact, since it’s a fabless design, the foundry has all the liberty on the earth in relation to utilizing one kind of transistor or one other for the development of the completely different logic gates that make up the chip.

So, as you may see within the picture above these strains, we will deduce the place TSMC will get its figures fromsure And it’s that it refers solely to the density of logic. So the SRAM or the analog components of the chip are dominated out, for instance. By the way in which, it may be seen how the bounce from the present nodes to the longer term ones doesn’t lead to a considerable saving in consumption or an necessary improve in pace. Which partly explains the elevated consumption of high-end fashions of the subsequent era of graphics playing cards from NVIDIA and AMD.

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In any case, this doesn’t have an effect on any of the companions of the foundry and the longer term chips that will probably be made in it. Lots of them already completed and about to be printed on their wafers on a big scale.